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IEEE Computer Architecture Letters

短名	IEEE Comput. Arch. Lett.
Journal Impact	1.36
国际分区	COMPUTER SCIENCE, HARDWARE & ARCHITECTURE(Q4)
期刊索引	SCI Q3中科院 3 区

ISSN	1556-6056, 1556-6064, 2473-2575
h-index	40
国内分区	计算机科学(3区)计算机科学计算机硬件(4区)

IEEE COMPUTER ARCHITECTURE LETTERS 是一个经过严格同行评审的论坛，用于在单处理器和多处理器计算机系统、计算机体系结构、微体系结构、工作负载表征、性能评估和模拟技术以及功率感知计算等领域发布早期的高影响力成果。欢迎提交计算机体系结构中的任何主题，特别是但不限于：微处理器和多处理器系统、微体系结构和 ILP 处理器、工作负载表征、性能评估和模拟技术、编译器-硬件和操作系统-硬件交互、互连体系结构、内存和缓存系统、架构级别的功耗和散热问题、I/O 架构和技术、先前发布结果的独立验证、不成功技术的分析、特定领域的处理器架构（例如，嵌入式、图形、网络等）、真实的- 时间和高可用性架构，可重新配置的系统。

期刊主页

涉及主题	计算机科学工程类操作系统程序设计语言并行计算数学嵌入式系统物理电气工程计算机网络计算机体系结构计算机硬件电信量子力学地理经济
出版信息	出版商: Institute of Electrical and Electronics Engineers Inc.，出版周期: ，期刊类型: journal
基本数据	创刊年份: 2002，原创研究文献占比: 100.00%，自引率:7.10%， Gold OA占比: 10.77%
平均审稿周期	网友分享经验：>12周，或约稿
平均录用比例	网友分享经验：容易

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Accelerating Programmable Bootstrapping Targeting Contemporary GPU Microarchitecture

2024-1-1

Empirical Architectural Analysis on Performance Scalability of Petascale All-Flash Storage Systems

2024-1-1

A Quantitative Analysis of State Space Model-Based Large Language Model: Study of Hungry Hungry Hippos

2024-1-1

JANM-IK: Jacobian Argumented Nelder-Mead Algorithm for Inverse Kinematics and Its Hardware Acceleration

2024-1-1

FullPack: Full Vector Utilization for Sub-Byte Quantized Vector-Matrix Multiplication on General Purpose CPUs

2024-1-1

Primate: A Framework to Automatically Generate Soft Processors for Network Applications

2024-1-1

The Importance of Generalizability in Machine Learning for Systems

2024-1-1

Approximate Multiplier Design With LFSR-Based Stochastic Sequence Generators for Edge AI

2024-1-1

GATe: Streamlining Memory Access and Communication to Accelerate Graph Attention Network with Near-Memory Processing

2024-1-1

UDIR: Towards a Unified Compiler Framework for Reconfigurable Dataflow Architectures

2024-1-1

DRAMA: Commodity DRAM Based Content Addressable Memory

2024-1-1

Containerized In-Storage Processing Model and Hardware Acceleration for Fully-Flexible Computational SSDs

2024-1-1

Octopus: a Cycle-Accurate Cache System Simulator

2024-1-1

Inter-Temperature Bandwidth Reduction in Cryogenic QAOA Machines

2024-1-1

Baobab Merkle Tree for Efficient Secure Memory

2024-1-1

Hashing ATD Tags for Low-overhead Safe Contention Monitoring

2024-1-1

R.i.p. Geomean Speedup Use Equal-Work (Or Equal-Time) Harmonic Mean Speedup Instead

2024-1-1

DRAMATON: A Near-DRAM Accelerator for Large Number Theoretic Transforms

2024-1-1

Adaptive Web Browsing on Mobile Heterogeneous Multi-cores

2024-1-1

Improving Energy-efficiency of Capsule Networks on Modern GPUs

2024-1-1

An Area Efficient Architecture of a Novel Chaotic System for High Randomness Security in e-Health

2024-1-1

TeleVM: A Lightweight Virtual Machine for RISC-V Architecture

2024-1-1

SLO-aware GPU DVFS for Energy-efficient LLM Inference Serving

2024-1-1

Enhancing the Reach and Reliability of Quantum Annealers by Pruning Longer Chains

2024-1-1

eDKM: An Efficient and Accurate Train-time Weight Clustering for Large Language Models

2024-1-1

Analysis of Data Transfer Bottlenecks in Commercial PIM Systems: A Study with UPMEM-PIM

2024-1-1

Reducing the Silicon Area Overhead of Counter-Based Rowhammer Mitigations

2024-1-1

Achieving Forward Progress Guarantee in Small Hardware Transactions

2024-1-1

Exploiting Direct Memory Operands in GPU Instructions

2024-1-1

gem5-accel: A Pre-RTL Simulation Toolchain for Accelerator Architecture Validation

2024-1-1

FPGA-Accelerated Data Preprocessing for Personalized Recommendation Systems

2024-1-1

Architecting Compatible PIM Protocol for CPU-PIM Collaboration

2024-1-1

Smart Memory: Deep Learning Acceleration In 3D-Stacked Memories

2024-1-1

Tulip: Turn-Free Low-Power Network-on-Chip

2024-1-1

Supporting a Virtual Vector Instruction Set on a Commercial Compute-in-SRAM Accelerator

2024-1-1

DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity

2024-1-1

Address Scaling: Architectural Support for Fine-Grained Thread-Safe Metadata Management

2024-1-1

A Case for In-Memory Random Scatter-Gather for Fast Graph Processing

2024-1-1

MajorK: Majority based <i>k</i>mer matching in commodity DRAM

2024-1-1

Characterizing Machine Learning-Based Runtime Prefetcher Selection

2024-1-1

Proactive Embedding on Cold Data for Deep Learning Recommendation Model Training

2024-1-1

SparseLeakyNets: Classification Prediction Attack Over Sparsity-Aware Embedded Neural Networks Using Timing Side-Channel Information

2024-1-1

Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator

2024-1-1

Architectural Implications of GNN Aggregation Programming Abstractions

2024-1-1

TURBULENCE: Complexity-effective Out-of-order Execution on GPU with Distance-based ISA

2024-1-1

Exploiting Intel<sup>®</sup> Advanced Matrix Extensions (AMX) for Large Language Model Inference

2024-1-1

LTE: Lightweight and Time-Efficient Hardware Encoder for Post-Quantum Scheme HQC

2024-1-1

Accelerating Deep Reinforcement Learning via Phase-Level Parallelism for Robotics Applications

2024-1-1

Direct-Coding DNA With Multilevel Parallelism

2024-1-1

Efficient Memory Layout for Pre-Alignment Filtering of Long DNA Reads Using Racetrack Memory

2024-1-1

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IEEE Computer Architecture Letters

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最新文章

Accelerating Programmable Bootstrapping Targeting Contemporary GPU Microarchitecture

Empirical Architectural Analysis on Performance Scalability of Petascale All-Flash Storage Systems

A Quantitative Analysis of State Space Model-Based Large Language Model: Study of Hungry Hungry Hippos

JANM-IK: Jacobian Argumented Nelder-Mead Algorithm for Inverse Kinematics and Its Hardware Acceleration

FullPack: Full Vector Utilization for Sub-Byte Quantized Vector-Matrix Multiplication on General Purpose CPUs

Primate: A Framework to Automatically Generate Soft Processors for Network Applications

The Importance of Generalizability in Machine Learning for Systems

Approximate Multiplier Design With LFSR-Based Stochastic Sequence Generators for Edge AI

GATe: Streamlining Memory Access and Communication to Accelerate Graph Attention Network with Near-Memory Processing

UDIR: Towards a Unified Compiler Framework for Reconfigurable Dataflow Architectures

DRAMA: Commodity DRAM Based Content Addressable Memory

Containerized In-Storage Processing Model and Hardware Acceleration for Fully-Flexible Computational SSDs

Octopus: a Cycle-Accurate Cache System Simulator

Inter-Temperature Bandwidth Reduction in Cryogenic QAOA Machines

Baobab Merkle Tree for Efficient Secure Memory

Hashing ATD Tags for Low-overhead Safe Contention Monitoring

R.i.p. Geomean Speedup Use Equal-Work (Or Equal-Time) Harmonic Mean Speedup Instead

DRAMATON: A Near-DRAM Accelerator for Large Number Theoretic Transforms

Adaptive Web Browsing on Mobile Heterogeneous Multi-cores

Improving Energy-efficiency of Capsule Networks on Modern GPUs

An Area Efficient Architecture of a Novel Chaotic System for High Randomness Security in e-Health

TeleVM: A Lightweight Virtual Machine for RISC-V Architecture

SLO-aware GPU DVFS for Energy-efficient LLM Inference Serving

Enhancing the Reach and Reliability of Quantum Annealers by Pruning Longer Chains

eDKM: An Efficient and Accurate Train-time Weight Clustering for Large Language Models

Analysis of Data Transfer Bottlenecks in Commercial PIM Systems: A Study with UPMEM-PIM

Reducing the Silicon Area Overhead of Counter-Based Rowhammer Mitigations

Achieving Forward Progress Guarantee in Small Hardware Transactions

Exploiting Direct Memory Operands in GPU Instructions

gem5-accel: A Pre-RTL Simulation Toolchain for Accelerator Architecture Validation

FPGA-Accelerated Data Preprocessing for Personalized Recommendation Systems

Architecting Compatible PIM Protocol for CPU-PIM Collaboration

Smart Memory: Deep Learning Acceleration In 3D-Stacked Memories

Tulip: Turn-Free Low-Power Network-on-Chip

Supporting a Virtual Vector Instruction Set on a Commercial Compute-in-SRAM Accelerator

DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity

Address Scaling: Architectural Support for Fine-Grained Thread-Safe Metadata Management

A Case for In-Memory Random Scatter-Gather for Fast Graph Processing

MajorK: Majority based <i>k</i>mer matching in commodity DRAM

Characterizing Machine Learning-Based Runtime Prefetcher Selection

Proactive Embedding on Cold Data for Deep Learning Recommendation Model Training

SparseLeakyNets: Classification Prediction Attack Over Sparsity-Aware Embedded Neural Networks Using Timing Side-Channel Information

Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator

Architectural Implications of GNN Aggregation Programming Abstractions

TURBULENCE: Complexity-effective Out-of-order Execution on GPU with Distance-based ISA

Exploiting Intel<sup>®</sup> Advanced Matrix Extensions (AMX) for Large Language Model Inference

LTE: Lightweight and Time-Efficient Hardware Encoder for Post-Quantum Scheme HQC

Accelerating Deep Reinforcement Learning via Phase-Level Parallelism for Robotics Applications

Direct-Coding DNA With Multilevel Parallelism

Efficient Memory Layout for Pre-Alignment Filtering of Long DNA Reads Using Racetrack Memory

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